1. Field of the Invention
The present invention relates to a semiconductor device and a fabricating method thereof, and more particularly to a semiconductor device and a method of fabricating the device to prevent a gate oxide layer from being deteriorated by damage induced during a plasma fabrication process.
2. Description of the Prior Art
High integration of the semiconductor device has been achieved, in general, through advancements in photo processes and etching processes such as the plasma etching process or the reactivity ion etching process. During such etching processes, electric charge can be accumulated at the floating gate oxide layer, thereby causing a defect on the gate oxide layer and further deteriorating operational properties of the semiconductor device.
Recent trends have led to the common use of a double-metal layering process for fabricating high-speed semiconductor devices. As device integration increases in this manner, the high-density plasma etching process becomes increasingly important for etching narrow lines. During the plasma etching process, serious damage may be inflicted on the gate oxide layer, causing variations in threshold voltage or deterioration of the drain saturated current (Idsat). As a result, the expected lifetime of the gate oxide layer becomes shorter, and operational failure of the semiconductor device is more likely.
In an attempt to alleviate this problem, others have designed a semiconductor device configuration for mitigating deterioration of the gate oxide layer arising from the plasma process, as shown in FIG. 1. In this configuration, the active region of the P type silicon substrate 10 is constructed with N+ diffusion regions 11, 13 to provide transistor sources and drains, and an N+ diffusion region 15 to serve as a cathode for a device protection diode. A polysilicon layer 30 for a gate electrode is formed on the gate oxide layer 20 between the N+ diffusion regions 11, 13. Metal layers 51, 53 are electrically connected to the N+ diffusion regions 11, 13 respectively through contact holes of an inter-level insulating layer 40, and a metal pathway 55 is electrically connected between the N+ diffusion region 15 and the gate electrode 30 through a contact hole in the inter-level insulating layer 40. The P-type silicon substrate 10 below the N+ diffusion region 15 operates as an anode of the protection diode.
In the embodiment of FIG. 1, deterioration of the gate oxide layer 20 due to damage induced in the plasma etching process necessary for deposition of the metal layer 50 is mitigated because the polysilicon layer 30 for the gate electrode and N+ diffusion region 15 for the cathode of the protection diode are electrically connected by the metal layer 55.
However, electric charge in the form of ions, radicals or electrons is accumulated on the polysilicon layer 30 during the selective etching process. Consequently, the charged ions, radicals or electrons flow, via Fowler-Nordheim tunneling current or direct-tunneling current, through the gate oxide layer 20 to the silicon substrate 10. In this manner, the gate oxide layer 20 can suffer from deterioration due to the damage inflicted during the plasma etching process.
It is an object of the present invention to provide a semiconductor device and a fabricating method thereof for preventing deterioration of the device gate oxide layer by damage induced during a plasma etching process when a selective etching process is performed on a polysilicon layer for a gate electrode.
In order to accomplish the aforementioned object of the present invention, there is provided a semiconductor device comprising a silicon substrate having an active area and a dummy active area. An ion implanted layer is formed in the dummy active area for restricting, or attenuating, oxidation thereof. A first oxide layer of a first thickness is formed on the active area of the silicon substrate. A second gate oxide layer of a second thickness, less than the first thickness, is formed on the ion-implanted layer of the dummy active area. A first gate is formed at a predetermined position of the first gate oxide layer.
Preferably, the second thickness of the second gate oxide layer is less than 20 Angstroms (hereinafter referred to as A). The ion implanted layer can be made of a nitrogen ion implanted layer. In order to form the second thickness of the second gate oxide layer at less than 20A, the density of nitrogen ions is greater than 1E15 atoms/cm2. A second gate can optionally be formed at a predetermined portion of the second gate oxide layer.
In order to accomplish the aforementioned object of the present invention, there is further provided a method of fabricating a semiconductor device. A field oxide region is formed on a silicon substrate for electrically dividing an active area and a dummy active area. A first oxide layer is formed at a first thickness on the active area and a second oxide layer is formed at a second thickness on the dummy active area. A first gate is formed at a predetermined position of the first oxide layer in an etching process, whereby excess charge generated during the etching process is conducted through the dummy active area and into the substrate.
The method may further comprise, following formation of the first and second gate oxide layers, forming a polysilicon layer on the field oxide region and the first and second oxide layers, such that during subsequent formation of the first gate by the etching process, excess charge generated in the region of the active area oxide layer is conducted over the field oxide region, and through the thinner second oxide layer, into the substrate. Following the etching process, portions of the polysilicon layer are preferably masked to electrically insulate the active area from the dummy active area.
Preferably, the second oxide layer is formed at a thickness of less than 20A. The step of forming the second oxide layer includes a step of forming an ion implanted layer where ions are selectively implanted for restricting oxidation at the silicon substrate of the dummy active area. The ion implanted layer can be made of a nitrogen ion implanted layer. In order to form the second thickness of the second oxide layer at less than 20A, the density of nitrogen ions is preferably set to greater than 1E15 atoms/cm2. At the step of forming the first gate, a second gate of the polysilicon layer can also be formed at a predetermined position on the second oxide layer.
Therefore, according to the present invention, if the polysilicon layer is formed at the first and second gate oxide layers of the active and dummy active area by the plasma etching process in a pattern of the polysilicon layer for the first and second gates, electric charge is not accumulated at the polysilicon layer, as the charge is discharged through the second gate oxide layer, thereby preventing deterioration of the gate oxide layer of the active area and thereby maintaining the operational properties of the semiconductor device.